In general, the reliability of an information processing system executing software (application program) is evaluated in a test executed after development of the software. A defect (a bug) of software causing a fault is found in the test and then corrected. The total number of found bugs becomes larger during a period that tests are executed in accordance with the number of executed tests.
The number of bugs found in one test generally decreases as the number of executed tests (i.e., the number of bugs corrected after the tests) increases. Then, when the number of executed tests reaches a relatively large number, the number of bugs found in one test becomes small enough.
Patent Document 1 discloses a technique of calculating software reliability (a value representing the degree of reliability of software) based on a model representing the abovementioned phenomenon. This model, which represents a phenomenon that software reliability gradually increases as the number of executed tests increases, is called a software reliability growth model. A system reliability evaluation device using this technique evaluates the reliability of an information processing system executing software (i.e., system reliability), by using the software reliability growth model.
On the other hand, software is generally configured by combining a plurality of software components operating in connection with (in cooperation with) each other. Patent Document 2 discloses a technique of calculating the software reliability of each of the software components based on information on a defect occurring in only the software component.
Further, Non-Patent Document 1 discloses a technique of structuring a model that represents the architecture of software in which a plurality of software components are combined, a relation in which one of a plurality of software components calls another (i.e., a call relation), and the like, and evaluating system reliability based on the model.    [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2005-63208    [Patent Document 2] Japanese Unexamined Patent Application Publication No. 2006-99308    [Non-Patent Document 1] S. Gokhale, K. S. Trivedi, “Analytical Models for Architecture-Based Software Reliability Prediction: A unification Framework,” IEEE Transactions on Reliability, The Institute of Electrical and Electronics Engineers, Inc., 2006, vol. 55, issue 4, pp. 578 to 590
Defects occurring in software include a defect occurring in a connection between software components. Moreover, a relation between a defect occurring in a connection between software components and system reliability may be different from a relation between a defect occurring in the entire software and system reliability, or may be different from a relation between a defect occurring in only each of the software components and system reliability.
Therefore, in a case that a system reliability evaluation device is configured to evaluate system reliability based on a defect occurring in only each of the software components or a defect occurring in the entire software, there is a case that the system reliability evaluation device cannot evaluate system reliability with high accuracy.
Further, it is relatively difficult to structure a model that accurately represents a configuration of software in which a plurality of software components are combined, a call relation, and the like. Furthermore, there is a problem that processing load on a system reliability evaluation device for evaluating system reliability based on such a model is relatively large.